AEC - Q100-005 - Rev-D1: Non-Volatile Memory Program/Erase Endurance, Data Retention, and Operational Life Test


  • NOTE (dated August 20, 2013): The AEC - Q100-005 document was revised to correct errors that occurred during the publication process. The Rev-D1 document is the version approved by the AEC Technical Committee.

  • [Decommissioned] AEC - Q100-006 - Rev-D: Electro-Thermally Induced Parasitic Gate Leakage Test (GL)
  • AEC - Q100-007 - Rev-B: Fault Simulation and Test Grading
  • AEC - Q100-008 - Rev-A: Early Life Failure Rate (ELFR)
  • AEC - Q100-009 - Rev-B: Electrical Distribution Assessment
  • AEC - Q100-010 - Rev-A: Solder Ball Shear Test
  • AEC - Q100-011 - Rev-C1: Charged Device Model (CDM) Electrostatic Discharge Test 

    • NOTE (dated March 12, 2013): The AEC - Q100-011 document was revised to correct symbol errors that occurred during the conversion to PDF format. The revision only affects Table 4, Component Classification levels C4B and C6, where the >= symbol was inadvertently replaced with the = symbol. No other modifications have been made to the document.

  • AEC - Q100-012 - Rev-: Short Circuit Reliability Characterization of Smart Power Devices for 12V Systems

  • AEC - Q101: Failure Mechanism Based Stress Test Qualification For Discrete Semiconductors


    • NOTE (dated August 20, 2013): The AEC Technical Committee dedicates AEC-Q101 Rev D1 in memory of:

      Ted Krueger 
      (1955-2013)             		Mark Gabrielle 
      (1957-2013)